Hardware resources contention-aware scheduling of hard real-time multiprocessor systems

In hard real-time embedded systems, switching to multicores is a step that most application domains delay as much possible. This mainly due the number of sources indeterminism, which involve shared hardware resources, such buses, caches, and memories. this paper, new task model considers interference execution causes in other tasks running on cores memory contention proposed. We propose scheduling algorithm calculates exact interference. also analyse compare existing partitioning algorithms three strategies allocate schedule many possible minimise total • Definition delays resources. Proposal copes with model. formulated be included any priority-based for monocores. allocation comparison ones terms schedulability utilisation system.